Technology

Among the TSV processes that have been highlighted, lithography is an important process that affects the device performance and yield.
The back-to-front overlay arrangement through the final patterning is definitely essential.
Substituting the existing wire bonding, TSV is a packaging technology that connects the top and bottom chips with electrodes by punching a fine hole (via) on the chip. Since it does not require any additional space after the stacking of the chips, it is possible to make great improvements in terms of the speed, power consumption, and area compared to the existing wire bonding. In the laminated semiconductor where each die is stacked on top of another, the dies are interconnected together through thousands and tens of thousands of μ(micro)-bumps.
If the connection does not work properly, the semiconductor cannot perform, and due to the laminated structure, there would be the need to throw multiples of more chips if any defects are found. Thus, an arrangement inspection has become one of the essential processes.